1. Field of the Invention
The invention relates to methods of producing polysilicon structures and somewhat more particularly to producing polysilicon structures in the 1 .mu.m range on substrates containing integrated semiconductor circuits by plasma etching in a large plate reactor with a reactive gas mixture.
2. Prior Art
Reactive dry etching techniques are primarily utilized at present for producing structures in polysilicon layers during fabrication of large scale integrated semiconductor circuits. With polysilicon layers, such dry etching techniques are frequently practiced in tunnel reactors with reactive gas mixtures consisting of carbon tetrafluoride, (CF.sub.4), and oxygen. A disadvantage of this technique is the occurrence of under-cutting, as with wet-etching (chemical etching), as well as a non-uniform etching reaction. Therefore, workers utilized plate reactors, instead of tunnel reactors, for dry etching. Tunnel reactors continues to be used in uncritical process steps, i.e., for production of large structures or where surface-wide etching is desired.
With the use of plate reactors, two etching techniques are possible:
1. A plasma etching in which substrates to be etched are positioned on grounded electrodes and CF.sub.4 or fluorine-chlorine mixed gases are utilized in the reactive gas with gas pressure ranging from 50 to 150 Pa. This type of etching is, for example, described in an article by H. Mader, ECS Spring Meeting, (1980) pages 274-276 or in an article by C. J. Mogab et al., J. Vac. Sci. Technol., Vol. 17, No. 3, (May/June 1980), pages 721-730. PA1 2. A reactive sputter etching or ion etching in which substrates to be etched are positioned on HF--conductive electrodes and sulfur hexafluoride, (SF.sub.6), is utilized as a reaction gas with nitrogen or helium as a carrier gas. This type of etching is, for example, described in an article by R. A. Gdula, ECS Fall Meeting, (1979) pages 1524-1526 or in an article by N. Endo et al., IEEE Transactions On Electron Devices, Vol. ED-27, No. 8, (August 1980), pages 1346-1351.
The foregoing etching techniques are disadvantageous because they produce too low of a uniformity in the etching reaction (corrosion), have a too low of a selectivity for the materials being etched or they create high under-cuttings so that their use in large plate reactors suitable for fabrication of integrated semiconductor circuits is not possible.